Wafer fabrication process simulation including cost: which should be used in an inline wafer inspection strategy, high sensitivity high cost inspection machine or low sensitivity low cost inspection machine?

摘要

By combing an event-driven simulation method including costs and a simple VLSI particle-induced yield predictor, we discuss that which should be used in an inline wafer inspection strategy, a high sensitivity & high cost inspection machine or a low sensitivity & low cost inspection machine. Two segments of a DRAM fab line including the inspection and the defect sourcing stages are modeled. Simulated results show that setting an adequate wafer rejection condition and selecting a proper sampling plan obtain the minimum cost per chip regardless of the kind of inspection machine.