REDUCED AREA MEDIAN FILTER USING A SCHEDULING CIRCUIT THAT RE-USES COMPARATORS WHEN SORTING A SEQUENCE OF INPUT DATA SAMPLES

摘要

A technique for sorting input data values using a sorting circuit is provided. The sorting circuit includes a single stage of comparators coupled to a bank of registers. A multiplexor and a sequencer are used to route a comparator output back to a comparator input such that the comparator can be re-used over multiple sorting phases so as to order an input sequence of data values into a partially-sorted sequence or into a completely sorted sequence which is monotonically increasing or decreasing. By re-using the comparator, the hardware required for the sorting is significantly reduced relative to the conventional technique. Also, provided is a technique for median filtering which uses a sorted sequence output by the sorting circuit provided in the specification.