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Thread and data assignment in multi-core processors based on cache miss data and thread category
Thread and data assignment in multi-core processors based on cache miss data and thread category
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机译:基于高速缓存未命中数据和线程类别的多核处理器中的线程和数据分配
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摘要
Methods and systems to assign threads in a multi-core processor are disclosed. A method to assign threads in a multi-core processor may include determining data relating to memory controllers fetching data in response to cache misses experienced by a first core and a second core. Threads may be assigned to cores based on the number of cache misses processed by respective memory controllers. Methods may further include determining that a thread is latency-bound or bandwidth-bound. Threads may be assigned to cores based on the determination of the thread as latency-bound or bandwidth-bound. In response to the assignment of the threads to the cores, data for the thread may be stored in the assigned cores.
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