首页>
外国专利>
Linear feedback shift register-based clock signal generator, time domain-interleaved analog to digital converter and methods
Linear feedback shift register-based clock signal generator, time domain-interleaved analog to digital converter and methods
展开▼
机译:基于线性反馈移位寄存器的时钟信号发生器,时域交织的模数转换器和方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
Disclosed is a linear feedback shift register (LFSR)-based clock signal generator that includes an LFSR, which outputs multi-bit states based on a system clock signal (CLK0). Based on the multi-bit states, a single-phase pulse generator generates first and second clock signals (CLK1 and CLK2), where the pulse rate of CLK1 is slower than that of the CLK0 and greater than that of CLK2. In some embodiments, a first multi-phase pulse generator can generate N-phases of the CLK1 based on CLK1 and N-phases of the CLK0 and a second multi-phase pulse generator can generate N-phases of CLK2 based on CLK2 and N-phases of CLK0. Furthermore, additional registers can optionally use the N-phases of CLK2 to further generate N sets of M-phases of the CLK2. Also disclosed are a multi-level circuit (e.g., a time domain-interleaved analog-to-digital converter (ADC)), which incorporates the LFSR-based clock signal generator, and associated methods.
展开▼