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Resonant virtual supply booster for synchronous digital circuits having a predictable evaluate time

机译:用于同步数字电路的谐振虚拟电源升压器,具有可预测的评估时间

摘要

A booster for a digital circuit block provides speed and reliability at lower static power supply voltages, reducing overall power consumption of the circuits. The booster includes a transistor that couples a dynamic power supply node to a static power supply and is disabled in response to a boost clock. An inductor and capacitance, which may be the block power supply shunt capacitance, coupled to the dynamic power supply resonates so that the voltage of the dynamic power supply increases in magnitude to a value greater the static power supply voltage. A boost transistor is included in some embodiments to couple an edge of the clock to the dynamic power supply, increasing the voltage rise. Another aspect of the booster includes multiple boost transistors controlled by different boost clock phases so that the resonant boost circuit is successively stimulated to increase the amount of voltage rise.
机译:数字电路模块的升压器在较低的静态电源电压下提供了速度和可靠性,从而降低了电路的总体功耗。升压器包括将动态电源节点耦合到静态电源并响应升压时钟而被禁用的晶体管。耦合到动态电源的电感器和电容(可以是模块电源并联电容)发生谐振,从而使动态电源的电压幅度增加到一个大于静态电源电压的值。在一些实施例中包括升压晶体管,以将时钟的边缘耦合到动态电源,从而增加电压上升。升压器的另一方面包括由不同的升压时钟相位控制的多个升压晶体管,使得谐振升压电路被连续激励以增加电压上升量。

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