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GROUP III NITRIDE ENHANCEMENT-MODE HEMT BASED ON COMPOSITE BARRIER LAYER STRUCTURE AND MANUFACTURING METHOD THEREOF

机译:基于复合阻挡层结构的III族氮化物增强模式HEM及其制造方法

摘要

A group III nitride-enhanced HEMT based on a composite potential barrier layer structure and a manufacturing method thereof. The HEMT comprises a first semiconductor and a second semiconductor acting respectively as a channel layer and a potential barrier layer, a third semiconductor acting as a p-type layer, a source, a drain, and a gate. A groove structure is formed on the potential barrier layer corresponding to a region of the gate. The groove structure cooperates with the third semiconductor and the gate to form a p-type gate, and the second semiconductor comprises a first structure layer and a second structure layer sequentially disposed on the first semiconductor. With regards to the selected etching reagent, the first structure layer has higher etching resistance than the second structure layer. The HEMT structure can be more precisely controlled and also has better device performance, such as significantly reduced forward gate leakage and improved gate threshold voltage amplitude. The uniformity of device threshold voltage in a chip is improved, and the HEMT is easier to fabricate and suitable for large-scale production.
机译:基于复合势垒层结构的III族氮化物增强的HEMT及其制造方法。 HEMT包括分别充当沟道层和势垒层的第一半导体和第二半导体,充当p型层的第三半导体,源极,漏极和栅极。在势垒层上与栅极的区域相对应地形成沟槽结构。凹槽结构与第三半导体和栅极协作以形成p型栅极,并且第二半导体包括第一结构层和顺序设置在第一半导体上的第二结构层。关于所选择的蚀刻剂,第一结构层具有比第二结构层更高的抗蚀刻性。 HEMT结构可以得到更精确的控制,并且具有更好的器件性能,例如大大减少了正向栅极泄漏和改善了栅极阈值电压幅度。改善了芯片中器件阈值电压的均匀性,并且HEMT易于制造并且适合大规模生产。

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