METHOD, SYSTEM AND COMPUTER PROGRAM FOR SYNCHRONIZING DATA STREAMS WITH UNKNOWN DELAY

摘要

The invention solves the problems of delay between signals intended for parallel / simultaneous reproduction, between a certain point until the signals have been sampled and have got a common clock domain. The delays are caused, for example, by different length of wires, by heat generation or due to the design of internal circuits. The solution consists of a system, method and computer program where a flip-flop (v1, v2) for each receiver (m1, m2) has been added in between each receiver and a second device. The flip-flops input is a trigger signal (t) from the second device and the data dock (d1) from the receiver (m1). The flip output is used to tag each data stream (d1, d2) sent from a receiver (m1, m2) to a second device, so that they are stored in the correct order in a buffer (b2) for each data stream in the second device. Upon receipt of the data streams of the second device, a clock transition to the second devices 's clock domain (i_k) occurs in a first buffer (b1) per receiver. To solve the problem of different data streams being delayed, the marking made by the flip-flops is used. Data samples that are not properly marked will be thrown while marked data samples are added to a second buffer (b2) per receiver. When all of the data streams' other buffers (b2) contain information, they are read in parallel and signals are synchronized.