TUNNELING FIELD-EFFECT TRANSISTOR HAVING HIGH-K DIELECTRIC SPACER AND FABRICATION METHOD THEREOF

摘要

The present invention relates to a tunneling field-effect transistor having a high dielectric constant sidewall spacer and a manufacturing method thereof. A gate is formed to be underlapped on a p-i-n doping region of a semiconductor substrate and a sidewall spacer is formed at a higher dielectric constant than a silicon oxide film on the underlapped part so as to lower a tunneling barrier and resistance more than before and increase driving current, a sub-threshold slope (SS) and an on / off ratio, thereby intactly applying a current sidewall forming technology of a CMOS process.