LUT INFORMATION REVERSE ENGINEERING METHOD IN FPGA BIT STREAM AND APPARATUS THEREOF

摘要

According to the present invention, provided is a lookup table (LUT) information reverse engineering apparatus in an FPGA bit stream. The LUT information reverse engineering apparatus in an FPGA bit stream comprises: an LUT information reverse engineering DB generation unit including an LUT bit stream offset DB, an input pin bit offset DB, and a bit stream-INIT attribute value mapping table; and an LUT realization information reverse engineering unit extracting LUT information from an FPGA bit stream, and converting input pin information and an INIT attribute value into a logical formula to output the logical formula. The LUT used from the FPGA bit stream and a function realized by each LUT can be reverse-engineered into a logical formula form.;COPYRIGHT KIPO 2019