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ADVANCED APPLICATION OF AN ERROR CHECK AND CORRECTION CODE IN A MEMORY

机译:错误检查和更正代码在内存中的高级应用

摘要

An Error Checking and Correction (ECC) may be extended to allow the correction of memory subarray errors by means of an ECC code. A memory device has multiple input / output (I / O) ports for connection to an external device, such as a controller. The memory device has a plurality of arrays or subarrays that are specifically mapped to I / O ports and are not randomly branched. Thus, the data paths of the memory subarrays can be branched exclusively to a special I / O connection. The I / O port can be uniquely assigned to a single memory subarray or multiple memory subarrays mapped to a specific port. The mapping is in accordance with a code matrix, with code of the ECC code matrix corresponding to the particular I / O port serving to validate and correct data corruption errors and I / O errors for the one or more associated memory arrays.
机译:可以扩展错误检查和校正(ECC)以允许借助于ECC代码来校正存储器子阵列错误。存储设备具有多个输入/输出(I / O)端口,用于连接到外部设备(例如控制器)。该存储设备具有多个阵列或子阵列,这些阵列或子阵列专门映射到I / O端口并且没有随机分支。因此,内存子阵列的数据路径可以专门分支到特殊的I / O连接。 I / O端口可以唯一地分配给单个内存子阵列或映射到特定端口的多个内存子阵列。映射是根据代码矩阵进行的,其中与特定I / O端口相对应的ECC代码矩阵的代码用于验证和纠正一个或多个关联存储阵列的数据损坏错误和I / O错误。

著录项

  • 公开/公告号DE112017004966T5

    专利类型

  • 公开/公告日2019-06-19

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号DE20171104966T

  • 发明设计人 PETE VOGT;

    申请日2017-08-30

  • 分类号G06F11/10;

  • 国家 DE

  • 入库时间 2022-08-21 11:44:59

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