Delay time detection circuit, embossing information generation device, and delay time detection method

摘要

PROBLEM TO BE SOLVED: To provide an apparatus for generating highly accurate time information by a simple logic circuit. A delay time detection circuit includes a clock generation unit 11, a count unit 12, a vernier scale signal generation unit 13, and a delay time calculation unit. The clock generation unit 11 generates a vernier clock signal based on the system clock signal. The count unit 12 generates a count signal by sequentially and repeatedly incrementing a preset count number based on the vernier clock signal. The vernier scale signal generation unit 13 receives the count signal, and counts the vernier scale signal having a rectangular wave for a period corresponding to the second cycle at a rate of once in the count number and having a timing shift according to the second cycle. Generate as many as. The delay time calculation unit 14 receives the input clock signal and calculates the delay time within the range of the first cycle of the input clock signal with respect to the system clock signal based on the one scale signal having the timing that matches the input clock signal. To do. [Selection diagram] Fig. 1