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Randomization of dangling nodes in a digital circuit design to mitigate hardware trojans

机译:数字电路设计中的悬空节点随机化以减轻硬件木马

摘要

Described herein are various technologies pertaining to randomizing logic associated with dangling nodes in a digital circuit design. A dangling node is an input to or output from a logic gate in the digital circuit design that is identified as not impacting a desired output of the digital circuit design. Randomizing the logic associated with a dangling node can include deleting a logic gate, adding a logic gate, replacing a logic gate with another logic gate, etc. Randomizing the logic associated with the dangling node prevents hardware trojans that may have been inserted into the circuit design from being implemented in a circuit that is generated based upon the design.
机译:本文描述了与数字电路设计中与悬挂节点相关联的随机化逻辑有关的各种技术。悬空节点是数字电路设计中逻辑门的输入或输出,该逻辑门被标识为不影响数字电路设计的期望输出。随机化与悬空节点关联的逻辑可以包括删除逻辑门,添加逻辑门,用另一个逻辑门替换逻辑门等。对与悬空节点相关联的逻辑进行随机化可以防止可能已插入电路的硬件木马通过在基于该设计生成的电路中实现该设计而实现。

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