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Structure design generation for fixing metal tip-to-tip across cell boundary
Structure design generation for fixing metal tip-to-tip across cell boundary
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机译:生成用于跨细胞边界固定金属尖端的结构设计
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摘要
A method for semiconductor structure design includes performing, by a processor, error processing of an initial design file layout. The processor further detects a tip-to-tip (T2T) structure design violation at a design cell boundary for a metal layer above (Ma) a via (Vx) at a tip of the Ma for the initial design file layout for a semiconductor structure based on a library of pattern rules. Upon detection of the T2T structure design violation, the processor retargets the Vx for generating a resulting design file layout of the semiconductor structure.
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