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Method and apparatus for emulation of neuromorphic hardware including neurons and synapses connecting the neurons

机译:用于仿真包括神经元和连接神经元的突触的神经形态硬件的方法和设备

摘要

In a method for emulation of neuromorphic hardware on a computer processor, the neuromorphic hardware including computing circuits, the computing circuits including neurons and synapses connecting the neurons, the neurons being configured to communicate to each other through the synapses via spikes, the computing circuits being configured to execute in parallel in increments of time, the method includes, for each said time increment, emulating processing of the synapses, emulating processing of the neurons, and recording by the processor the next ones of the spikes for a subset of the neurons on a non-transitory physical medium. The processing of the synapses includes receiving previous ones of the spikes at presynaptic ends of the synapses, and transmitting the received previous ones of the spikes to postsynaptic ends of the synapses. The processing of the neurons includes receiving current ones of the spikes and generating next ones of the spikes.
机译:在用于在计算机处理器上仿真神经形态硬件的方法中,该神经形态硬件包括计算电路,该计算电路包括神经元和连接神经元的突触,该神经元被配置为经由尖峰经由突触彼此通信,该计算电路是被配置为以时间增量并行执行,该方法包括:对于每个所述时间增量,模拟突触的处理,模拟神经元的处理,并由处理器记录下一个神经元子集的下一个峰值。非暂时性物理介质。突触的处理包括在突触的突触前末端接收尖峰的先前尖峰,以及将所接收的突突的先前尖峰发送至突触的突触后末端。对神经元的处理包括接收当前的一个尖峰并生成下一个尖峰。

著录项

  • 公开/公告号US10726337B1

    专利类型

  • 公开/公告日2020-07-28

    原文格式PDF

  • 申请/专利权人 HRL LABORATORIES LLC;

    申请/专利号US201615143466

  • 发明设计人 COREY M. THIBEAULT;NARAYAN SRINIVASA;

    申请日2016-04-29

  • 分类号G06N3/10;G06N3/08;

  • 国家 US

  • 入库时间 2022-08-21 11:28:37

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