Circuit design verification in a hardware accelerated simulation environment using breakpoints

摘要

Embodiments of the present disclosure provide a method, a system, and a computer readable storage medium for circuit design verification. The user generates a breakpoint by execution of test bench code. A callback function is registered at an application level associated with the breakpoint. The callback function is configured to execute in response to an occurrence of the associated breakpoint at the system level. A hardware-accelerated simulator simulates an execution of a circuit design using the test bench code. In response to triggering the breakpoint at the system level, the execution of the circuit design at the system level is paused and the callback function associated with the breakpoint at the application level is executed.