首页> 外国专利> Charge-based digital to analog converter with second order dynamic weighted algorithm

Charge-based digital to analog converter with second order dynamic weighted algorithm

机译:基于电荷的数模转换器,具有二阶动态加权算法

摘要

A method includes receiving samples of digital to analog converter (DAC), partitioning the samples to unit-DACs based upon previous partitions of inputs to the unit-DACs to cancel out integrated non-linearities of outputs of the DAC caused by the gain mismatches of the unit-DACs, including partitioning samples of DAC input to the unit-DACs through a recursive nth order partitioning algorithm. The algorithm includes, for each DAC input, determining a first partition of the DAC input that would cancel an (n−1)th order previously integrated non-linearity, adding an equivalent DAC input of the first partition to the DAC input to obtain a total DAC input, using a first order application of the total DAC input to the inputs of the unit-DACs to yield a second partition of DAC input, summing the first and second partitions generate a final partition, and, based on the final partition, computing non-linearity remainders at each order of integration.
机译:一种方法包括:接收数模转换器(DAC)的样本;基于对单元DAC的输入的先前划分,将样本划分为单元DAC,以抵消由DAC的增益失配引起的DAC输出的积分非线性。单元DAC,包括通过递归n阶分区算法对输入到DAC的DAC样本进行分区。该算法包括:对于每个DAC输入,确定将消除(n-1)阶先前积分的非线性的DAC输入的第一分区,将第一分区的等效DAC输入添加到DAC输入以获得一个总DAC输入,使用总DAC输入到单元DAC输入的一阶应用来产生DAC输入的第二分区,将第一和第二分区相加,生成最终分区,并基于最终分区,计算每个积分阶上的非线性余数。

著录项

  • 公开/公告号US10615821B2

    专利类型

  • 公开/公告日2020-04-07

    原文格式PDF

  • 申请/专利权人 MICROCHIP TECHNOLOGY INCORPORATED;

    申请/专利号US201916394392

  • 发明设计人 VINCENT QUIPUEMPOIX;EVE CARLETTI;

    申请日2019-04-25

  • 分类号H03M1/66;H03M3;H03M1/06;H03M1;

  • 国家 US

  • 入库时间 2022-08-21 11:26:18

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号