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Memory Arrays, Ferroelectric Transistors, and Methods of Reading and Writing Relative to Memory Cells of Memory Arrays

机译:存储器阵列,铁电晶体管以及相对于存储器阵列的存储器单元的读写方法

摘要

Some embodiments include a ferroelectric transistor. The transistor has gate dielectric material configured as a first container, with the first container having a first inner surface. Metal-containing material is configured as a second container nested within said first container. The second container has a second inner surface with an area less than the first inner surface. Ferroelectric material is configured as a third container nested within the second container. The third container has a third inner surface with an area less than the second inner surface. Gate material is within the third container. Some embodiments include memory arrays having ferroelectric transistors as memory cells. Some embodiments include methods of writing/reading relative to memory cells of memory arrays when the memory cells are metal-ferroelectric-metal-insulator-semiconductor (MFMIS) transistors.
机译:一些实施例包括铁电晶体管。晶体管具有配置为第一容器的栅极介电材料,其中第一容器具有第一内表面。含金属的材料被构造为嵌套在所述第一容器内的第二容器。第二容器具有面积小于第一内表面的第二内表面。铁电材料被配置为嵌套在第二容器内的第三容器。第三容器具有第三内表面,该第三内表面的面积小于第二内表面的面积。门材料位于第三个容器内。一些实施例包括具有铁电晶体管作为存储单元的存储阵列。一些实施例包括当存储单元是金属-铁电-金属-绝缘体-半导体(MFMIS)晶体管时相对于存储阵列的存储单元进行写入/读取的方法。

著录项

  • 公开/公告号US2020234751A1

    专利类型

  • 公开/公告日2020-07-23

    原文格式PDF

  • 申请/专利权人 MICRON TECHNOLOGY INC.;

    申请/专利号US202016838585

  • 申请日2020-04-02

  • 分类号G11C11/22;H01L21/28;H01L27/1159;H01L29/788;H01L27/11507;H01L29/78;

  • 国家 US

  • 入库时间 2022-08-21 11:23:33

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