首页> 外国专利> SEMICONDUCTOR PLASMA PROCESSING EQUIPMENT WITH WAFER EDGE PLASMA SHEATH TUNING ABILITY

SEMICONDUCTOR PLASMA PROCESSING EQUIPMENT WITH WAFER EDGE PLASMA SHEATH TUNING ABILITY

机译:具有晶片边缘等离子鞘调整能力的半导体等离子处理设备

摘要

Embodiments of the disclosure generally include methods and apparatuses that improve the etch rate uniformity across a surface of a substrate by controlling the shape of a plasma sheath formed across a substrate, such as a semiconductor wafer, during plasma processing. Embodiments of the disclosure will include the adjustment of one or more plasma processing variables and/or the adjustment of the configuration of process kit hardware that is in close proximity to a substrate and/or supports the substrate during processing. Furthermore, embodiments of the disclosure will include replacement of only a small number of consumable parts within the process kit hardware while the remaining parts of the process kit hardware are reused for long periods of time without venting the process chamber. The replacement of the consumable parts can be completed using an automated method of swapping used parts without venting process chamber.
机译:本公开的实施例大体上包括通过控制在等离子体处理期间在诸如半导体晶片之类的基板上形成的等离子体鞘的形状来改善横跨基板表面的蚀刻速率均匀性的方法和设备。本公开的实施例将包括对一个或多个等离子体处理变量的调整和/或对在处理期间非常靠近基板和/或支撑基板的处理套件硬件的配置的调整。此外,本公开的实施例将包括仅替换处理套件硬件内的少量可消耗部件,而处理套件硬件的其余部分可长时间重复使用而不会排放处理腔室。消耗零件的更换可以使用自动更换旧零件的方法完成,而无需排空处理室。

著录项

  • 公开/公告号US2020234928A1

    专利类型

  • 公开/公告日2020-07-23

    原文格式PDF

  • 申请/专利权人 APPLIED MATERIALS INC.;

    申请/专利号US201916672294

  • 发明设计人 YOGANANDA SARODE VISHWANATH;

    申请日2019-11-01

  • 分类号H01J37/32;H01L21/67;H01L21/687;

  • 国家 US

  • 入库时间 2022-08-21 11:23:33

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