首页> 外国专利> INTEGRATED NANOWIRE amp; NANORIBBON PATTERNING IN TRANSISTOR MANUFACTURE

INTEGRATED NANOWIRE amp; NANORIBBON PATTERNING IN TRANSISTOR MANUFACTURE

机译:晶体管制造中的集成纳米线和纳米线图案

摘要

Fabrication of narrow and wide structures based on lithographic patterning of exclusively narrow mask structures. Multi-patterning may be employed to define narrow mask structures. Wide mask structures may be derived through a process-based merging of multiple narrow mask structures. The merge may include depositing a cap layer over narrow structures, filling in minimum spaces. The cap layer may be removed leaving residual cap material only within minimum spaces. Narrow and wide structures may be etched into an underlayer based on a summation of the narrow mask structures and residual cap material. A plug pattern may further mask portions of the cap layer not completely filling space between adjacent mask structures. The underlayer may then be etched based on a summation of the narrow mask structures, plug pattern, and residual cap material. Such methods may be utilized to integrate nanoribbon transistors with nanowire transistors in an integrated circuit (IC).
机译:基于仅狭窄掩模结构的光刻图案化,可以制造狭窄和宽阔的结构。可以采用多图案来限定窄掩模结构。宽掩模结构可以通过多个窄掩模结构的基于过程的合并来获得。合并可以包括在狭窄的结构上沉积覆盖层,以最小的空间填充。可以去除覆盖层,仅在最小空间内保留残留的覆盖材料。可以基于窄掩模结构和残余盖材料的总和将窄结构和宽结构蚀刻到底层中。栓塞图案可以进一步掩盖覆盖层的部分,而不完全填充相邻掩膜结构之间的空间。然后可以基于窄掩模结构,插塞图案和残留盖材料的总和来蚀刻底层。可以利用这样的方法将纳米带晶体管与纳米线晶体管集成在集成电路(IC)中。

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