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1T1D DRAM CELL AND ACCESS METHOD AND ASSOCIATED DEVICE FOR DRAM

机译:1t1d dram单元及dram的访问方法及相关装置

摘要

The beginning of using Complementary Metal-Oxide-Semiconductor (CMOS) process technology to implement Static Random-Access Memory (SRAM) which transistor number is six. And then reducing transistor number for increasing integration density, but it will diminish the stability of memory, and also may enhance the complexity of access circuit, thus increasing the power consumption. For increasing the integration density of SRAM, and according to the electrical characteristics of reduced transistor number therefore designing the memory possess low power consumption and its corresponding circuits, and then implementing an access system. If electrical characteristic of the other various memories are similar to SRAM, such as Dynamic Random-Access Memory (DRAM), so they can also use the corresponding access circuit of SRAM.
机译:开始使用互补金属氧化物半导体(CMOS)工艺技术来实现晶体管数为6的静态随机存取存储器(SRAM)。然后减少晶体管数目以增加集成密度,但这会降低存储器的稳定性,也可能增加存取电路的复杂度,从而增加功耗。为了增加SRAM的集成密度,并且根据减少的晶体管数量的电特性,因此设计存储器具有低功耗及其相应的电路,然后实现访问系统。如果其他各种存储器的电气特性类似于SRAM,例如动态随机存取存储器(DRAM),则它们也可以使用SRAM的相应访问电路。

著录项

  • 公开/公告号US2019362778A1

    专利类型

  • 公开/公告日2019-11-28

    原文格式PDF

  • 申请/专利权人 CHAO-JING TANG;

    申请/专利号US201916533755

  • 发明设计人 CHAO-JING TANG;

    申请日2019-08-06

  • 分类号G11C11/419;G11C11/409;G11C11/406;G11C11/408;G11C11/412;G11C11/418;G11C5/14;G11C11/4094;G11C11/4074;G11C11/405;G11C7/12;

  • 国家 US

  • 入库时间 2022-08-21 11:19:15

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