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METHOD AND SYSTEM FOR MAINTAINING A LOW-JITTER LOW-TEMPERATURE-DRIFT CLOCK DURING A HOLDOVER OPERATION
METHOD AND SYSTEM FOR MAINTAINING A LOW-JITTER LOW-TEMPERATURE-DRIFT CLOCK DURING A HOLDOVER OPERATION
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机译:在保持操作期间保持低抖动低温漂移时钟的方法和系统
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摘要
Various embodiments a PLL-based clock unit is disclosed. An exemplary clock unit includes a PLL, a low-jitter XO to provide a low-jitter input clock and a low-cost TCXO to provide a low-temperature-drift clock. The clock unit additionally includes a holdover module coupled to the PLL and configured to receive the low-jitter input clock and a reference input clock; record a relationship between the low-jitter input clock and the reference input clock during a normal operation mode; and output the recorded relationship to the PLL as a control signal during a holdover operation mode when the reference input clock is unavailable. This clock unit additionally includes a statistical module to compute a relationship between the low-jitter input clock and the low-temperature-drift clock; and a control module to dynamically adjust the output of the holdover module based on the determined relationship so that the output clock of the clock unit maintains both low-jitter and low-temperature-drift characteristics.
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