MEMORY DEVICE WITH BIT LINES DISCONNECTED FROM NAND STRINGS FOR FAST PROGRAMMING

摘要

Techniques for fast programming and read operations for memory cells. A first set of bit lines is connected to a first set of NAND strings and is interleaved with a second set of bit lines connected to a second set of NAND strings. The first set of NAND strings can be programmed by driving a voltage on the first set of bit lines while floating a voltage on the second set of bit lines, to reduce an inter-bit line capacitance and provide a relatively high access speed and a relatively low storage density (e.g., bits per memory cell). The second set of NAND strings can be programmed by concurrently driving a voltage on the first and second sets of bit lines, to provide a relatively low access speed and a relatively high storage density.