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METHOD OF PARITY TRAINING FOR A DRAM SUPPORTING A LINK ERROR CHECKING AND CORRECTING FUNCTIONALITY
METHOD OF PARITY TRAINING FOR A DRAM SUPPORTING A LINK ERROR CHECKING AND CORRECTING FUNCTIONALITY
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机译:支持链接错误检查和纠正功能的DRAM奇偶校验训练方法
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摘要
A method of parity training for a dynamic random access memory, DRAM, is disclosed. The method comprises enabling a link error checking and correcting, ECC, functionality in a write operation of the DRAM, and remapping a parity function of a write parity pin to an data inversion function, a data replacing function, or a logical function, whereby data transferred to the DRAM through the write parity pin is used for indicating an inversion operation, a logical operation, or a substitution operation for data of a data pin.
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