A housing for an electronic device including a metal substrate, a pearlized layer, and a sealant layer. The metal substrate can have an exterior surface with a porous oxide layer including pores with an average size from about 2 nm to about 75 nm. The pearlized layer can be on the porous oxide layer, and can include a plurality of pearl particles positioned within pores of the porous oxide layer. The sealant layer can be on the pearlized layer.
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