DEVICE FOR RISC-V-BASED OPERATION INCLUDING HARDWARE-BASED FAST OPERATION SUPPORTING USER-DEFINED INSTRUCTION SET, AND METHOD THEREFOR

摘要

The present invention relates to a device for RISC-V-based operation including hardware-based fast operation supporting a user-defined instruction set, and a method therefor, wherein a hardware-based fast operation unit executing user-defined functions, along with a RISC-V-based operation device, is formed as a single chip through a field programmable gate array (FPGA), and normal operations and user-defined operations are performed at instruction level through a program using a RISC-V basic instruction set including a user-defined instruction set, rather than performed using special bus connection architecture, and the user-defined instruction set and corresponding functions can be freely changed to provide flexibility. The device makes it possible to implement a special purpose operation unit at instruction level without developing any dedicated ASIC using special purpose operations, etc. requiring conventional dedicated hardware, by performing "modification to a new processor architecture having a new ISA that is suitable for particular purposes" as in the way of conventional firmware updating that modifies only software configuration except for hardware configuration.