SPIN-ORBIT TORQUE BIT DESIGN FOR IMPROVED SWITCHING EFFICIENCY

摘要

The present invention relates to a method for a non-volatile memory cell, specifically, a spin-orbit torque MRAM (SOT-MRAM) memory cell for reducing current required for switching individual bits. The SOT-MRAM memory cell of the present invention includes: a first interconnect line having a first longitudinal axis; an oval MTJ bit (bit) having a long axis; and a second interconnect line having a second longitudinal axis perpendicular to the first interconnect line. The bit includes a polarized free layer, a barrier layer, and a polarized reference layer having a magnetic moment pinned at a different angle from a long axis. The long axis is disposed to form an angle with respect to the first and second longitudinal direction axes, the reference layer is disposed as described, and voltage is applied to the interconnect lines, thereby inducing a non-zero equilibrium angle between a spin current or a Rashba field and the free layer. Accordingly, switching dynamics may be more consistent.;COPYRIGHT KIPO 2020