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3D pixel circuit for microdisplay with reduced pixel size and method for forming same
3D pixel circuit for microdisplay with reduced pixel size and method for forming same
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机译:用于具有减小的像素尺寸的微型显示器的3D像素电路及其形成方法
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摘要
A vertical stack type comprising a high voltage device for driving a pixel on the upper silicon layer, and a low voltage circuit on the lower silicon layer (e.g., matrix addressing circuit, data storage circuit and uniformity compensation circuit) A vertically stacked) pixel circuit is provided. Circuits on the upper silicon layer and the lower silicon layer are electrically connected through a through-silicon electrode. This unique arrangement allows the high voltage device for driving a pixel to be physically located on top of a larger number of low voltage devices in the lower silicon layer, so that a substantial reduction of the entire pixel emission area can be achieved. The vertically stacked pixel circuit is particularly suitable for an organic light emitting diode microdisplay.
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