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VLSI INTEGRATING VLSI-COMPATIBLE FIN STRUCTURES WITH SELECTIVE EPITAXIAL GROWTH AND FABRICATING DEVICES THEREON
VLSI INTEGRATING VLSI-COMPATIBLE FIN STRUCTURES WITH SELECTIVE EPITAXIAL GROWTH AND FABRICATING DEVICES THEREON
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机译:VLSI集成具有选择性表皮生长和制造设备的VLSI兼容鳍结构
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摘要
Different n-type and p-type of device fins are used for epitaxially growing first epitaxial regions of a first type of material from the substrate surface at the bottom of the first trenches formed between Shallow Trench Isolation (STI) regions. Is formed by. The STI regions and the first trench heights are at least 1.5 times their width. The STI regions are etched to expose the top surface of the substrate to form second trenches between the first epitaxial regions. A layer of spacer material is formed in the second trenches on the sidewalls of the first epitaxial regions. Second epitaxial regions of the second type of material are grown from the substrate surface at the bottom of the second trenches between the first epitaxial regions. Pairs of n-type and p-type fins may be formed from the first and second epitaxial regions. These fins are co-integrated and reduce defects from material interface lattice mismatch.
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