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APPARATUS AND METHOD FOR TERNARY LOGIC SYNTHESIS WITH MODIFIED QUINE-MCCLUSKEY ALGORITHM
APPARATUS AND METHOD FOR TERNARY LOGIC SYNTHESIS WITH MODIFIED QUINE-MCCLUSKEY ALGORITHM
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机译:改进的Quén-MCcluskey算法进行三元逻辑合成的装置和方法
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摘要
It involves a method of ternary logic synthesis performed at least temporarily by a computer. Generating a switching table for a pull-up and pull-down circuit using the truth table using a truth table corresponding to a ternary function in one embodiment; Converting the switching table into a sum of products (Sum Of Product) using a Queen McClursky algorithm; Minimizing the sum of the products; And mapping a transistor corresponding to the sum of the products.
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机译:它涉及一种至少由计算机临时执行的三元逻辑综合方法。在一个实施例中,使用与三元函数相对应的真值表的真值表,使用真值表生成上拉和下拉电路的切换表;使用Queen McClursky算法将转换表转换为乘积之和(Sum Of Product);最小化产品的总和;并映射一个对应于乘积之和的晶体管。
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