Storage structure-based coherency directory cache

摘要

In some examples, with respect to a memory fabric-based coherency directory cache implementation, a hardware sequencer may include hardware to identify contiguous cache lines for a coherency directory cache that includes information relating to multiple cache lines. A status associated with each of the adjacent cache lines can be determined. Based on a determination that the status associated with one of the adjacent cache lines is the same as the status associated with the remaining active adjacent cache lines, the adjacent cache lines can be grouped. The hardware sequencer can use an entry in a memory structure for the coherency directory cache to identify the grouped cache lines. Data associated with the entry in the memory structure can include more than two possible memory states.