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MODULAR IMPLEMENTATION OF A DIGITAL HARDWARE DESIGN AUTOMATION SYSTEM

机译:数字硬件设计自动化系统的模块实现

摘要

With the advent of LSI and VLSI technology, the demand and affordability of custom tailored design has increased considerably. A short turnaround time is desirable along with more credible testing techniques. For a low-production device it is necessary to reduce the time and money spent in the design process. Traditional hardware design automation techniques rely on extensive engineer interaction. A detailed description of the circuit to be manufactured must be entered manually. It is often necessary to prepare a separate description for each phase of the design process. In order to be successful, a modern design automation system must be capable of supporting all phases of design activities from a single circuit description. It must also provide an adequate level of abstraction so that the circuit may be described conveniently and concisely. Such abstraction is provided by computer hardware description languages (CHDL). In this research, an automation system based on AHPL (A Hardware Programming Language) has been developed. The project may be divided into three distinct phases: (1) Upgrading of AHPL to make it more universally applicable; (2) Implementation of a compiler for the language; and (3) Illustration of how the compiler may be used to support several phases of design activities. Several new features have been added to AHPL. These include: application-dependent parameters, multiple clocks, asynchronous results, functional registers and primitive functions. The new language, called Universal AHPL, has been defined rigorously. The compiler design is modular. The parsing is done by an automatic parser generated from the SLR(1) BNF grammar of the language. The compiler produces two data bases from the AHPL description of a circuit. The first one is a tabular representation of the circuit, and the second one is a detailed interconnection linked list. The two data bases provide a means to interface the compiler to application-dependent CAD systems. In the end, a discussion on how the AHPL compiler can be interfaced to other CAD systems is given, followed by examples from current applications and from ongoing research projects. These applications illustrate the usefulness of a CHDL-based approach to the design of digital hardware automation systems.
机译:随着LSI和VLSI技术的出现,定制设计的需求和可负担性已经大大增加。希望有一个短的周转时间以及更可靠的测试技术。对于低产量的设备,有必要减少设计过程中花费的时间和金钱。传统的硬件设计自动化技术依赖于广泛的工程师交互。必须手动输入要制造的电路的详细说明。通常有必要为设计过程的每个阶段准备单独的描述。为了获得成功,现代的设计自动化系统必须能够从单个电路描述中支持设计活动的所有阶段。它还必须提供足够的抽象级别,以便可以方便,简洁地描述电路。计算机硬件描述语言(CHDL)提供了这种抽象。在这项研究中,已经开发了基于AHPL(一种硬件编程语言)的自动化系统。该项目可以分为三个不同的阶段:(1)AHPL的升级,使其更通用。 (2)实现该语言的编译器; (3)说明如何使用编译器来支持设计活动的多个阶段。 AHPL已添加了几个新功能。其中包括:与应用程序相关的参数,多个时钟,异步结果,功能寄存器和原始函数。严格定义了称为通用AHPL的新语言。编译器设计是模块化的。解析是由自动解析器完成的,该解析器是根据该语言的SLR(1)BNF语法生成的。编译器根据电路的AHPL描述生成两个数据库。第一个是电路的表格表示,第二个是详细的互连链表。这两个数据库提供了将编译器连接到依赖于应用程序的CAD系统的方法。最后,讨论了如何将AHPL编译器连接到其他CAD系统,然后给出了来自当前应用程序和正在进行的研究项目的示例。这些应用说明了基于CHDL的方法在数字硬件自动化系统设计中的有用性。

著录项

  • 作者

    Masud Manzer 1950-;

  • 作者单位
  • 年度 1981
  • 总页数
  • 原文格式 PDF
  • 正文语种 en_US
  • 中图分类

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