VLSI implementation of moment invariants for automated inspection.

摘要

This paper describes the design of a VLSI ASIC for use in automated inspection. The inspection scheme uses Hu and Maitra's algorithms for moment invariants. A prototype design was generated that resolved the long delay time of the multiplier by custom designing adder cells based on the Manchester carry chain. The prototype ASIC is currently being fabricated in 2.0-(mu)m CMOS technology and has been simulated at 20 MHz. The final ASICs will be used in parallel at the board level to achieve the 230 MOPs necessary to perform the moment invariant algorithms in real time on 512 (times) 512 pixel images with 256 grey scales. 10 refs., 2 figs.