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Low Power 256K MRAM Design

机译:低功耗256K mRam设计

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A low power Magnetoresistive Random Access Memory (MRAM), that uses a novel Sandwich-Spin Dependent Tunneling (SSDT) memory bit is described. The SSDT bit combines a sandwich storage structure with tunneling magnetoresistance readout. A single, bi-polar write current is used to write the bit. A write select transistor, in the memory cell, selects a single bit for writing - thereby eliminating half-select conditions. Antiferromagnetic coupling in the sandwich film minimizes the required switching field, leading to low write currents - as low as 4 mA seen in 2 micrometers devices and 0.8 mA predicted for an 0.6 micrometers device. A two bit, differential cell, has been used to design a 256k memory.

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