Investigation of the Interfacing of the Intel iAPX 432/670 Computer System to the MIL-STD-1553B Multiplex Data Bus

摘要

This project was an investigation into the interfacing of the Intel iAPX 432/670 computer system to the MIL-STD-1553B data bus. The project involved developing a conceptual design for a military avionic subsystem based on the 432/670 computer system, defining the specific requirements for the subsystem, and demonstrating the feasibility of implementing the interface. The conceptual design of the 432/670 Avionic Subsystem includes development, operational, and maintenance configurations for the subsystem. The feasibility of interfacing this subsystem to the 1553B data bus was proven by designing the subsystem to a level at which the design could be evaluated against the specific requirements levied upon the interface. Strict adherence to structured design techniques, and implementation of time-critical message processing functions in the hardware, resulted in relative isolation of the 432/670-related characteristics. The design presented in this project is thus readily adaptable for use in subsystems based on processors with more standard architecture.