Production-Quality Unix Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) Subset Analyzer

摘要

This paper describes the design and implementation of the Air Force Institute of Technology's (AFIT's) UNIX-based VHDL Analyzer. The purpose of this tool is to facilitate the introduction of VHDL into the academic environment, which may not be able to use the Department of Defense's VMS-based software. This research emphasized two areas: the criteria for a production-quality software product and the design of an efficient Intermediate Representation (IR) that serves as an interface between the Analyzer and other tools in the AFIT VHDL Environment (AVE). Background on other UNIX VHDL analyzers, as well as other IRs, was presented. A two-part IR, based on Dallen's Patois hardware description language and named the VHDL Intermediate Access (VIA), was designed, and examples were given that illustrate its use. Test results showed that the Analyzer passed over 75% of the conformance tests from the VHDL VMS Analyzer Test Suite and performed well in the areas of compile time, memory usage, and disk usage. Recommendations for future research include adding user options to the Analyzer and implementing a design library for VHDL designs.