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Analysis of power supply interference effects on quasi-digital sensors

机译:电源干扰对准数字传感器的影响分析

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摘要

Quasi-digital sensors are very common and attractive for new designs because their time-based output signal can be directly connected to a digital system with time measurement capability. However, the same as modulating sensors, quasi-digital sensors are susceptible to power supply interference. Their data sheets specify a power supply rejection ratio (PSRR) value, but it often refers only to the effects on the bias error produced by a slow power supply voltage change. This paper provides a theoretical analysis of the effects of power supply interference on the output information of quasi-digital sensors. According to the developed models, the uncertainty in the output information depends on the frequency and the amplitude of the interference superimposed on the supply voltage. Furthermore, the sensor sensitivity to power supply interference also depends on the measurand. The proposed models are qualitatively validated with experimental data from commercial sensors based on pulse-frequency modulation (PFM). (c) 2004 Elsevier B.V. All rights reserved.
机译:准数字传感器非常常见,并且对新设计具有吸引力,因为它们基于时间的输出信号可以直接连接到具有时间测量功能的数字系统。但是,与调制传感器一样,准数字传感器也容易受到电源干扰的影响。他们的数据手册指定了电源抑制比(PSRR)值,但它通常仅指缓慢的电源电压变化对偏置误差的影响。本文对电源干扰对准数字传感器输出信息的影响进行了理论分析。根据已开发的模型,输出信息中的不确定性取决于叠加在电源电压上的干扰的频率和幅度。此外,传感器对电源干扰的敏感度还取决于被测物。基于脉冲频率调制(PFM)的商用传感器的实验数据对所提出的模型进行了定性验证。 (c)2004 Elsevier B.V.保留所有权利。

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