The Semiconductor Electronics Division has released a beta version of software on CD-ROM to forty semiconductor industry laboratories, which require accurate measurement of the level and distribution of dopant atoms within nanometer-scale transistor structures. The software provides an essential link between qualitative images measured by a scanning capacitance microscope (SCM) and quantitative data required in the fundamental design of the transistor. The International Technology Roadmap for Semiconductors identified SCM as a critical-path metrology for continued miniaturization of integrated circuits, and this software fanout highlights the success of integrated circuits, and this software fanout highlights the success of a systematic effort at NIST since the mid-1990s to address the shallow junction profiling problem. The structure addressed by SCM is the doped junction of the transistor, which is particularly difficult to measure, because it contains only parts-per-million levels of electrically active elements such as B or As (dopants) in a highly localized region. In the microscope, capacitance is sensed between the doped region and an ultra-sharp tip positioned close to the surface of a cross section cut through the structure. Modern circuits require precise description of the dopant distribution with a spatial resolution better than 10 nm, to enable precise electric field-control of electrons flowing through the device.
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