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Effects of Package Warpage on Head-in-Pillow Defect

机译:包装翘曲对枕头缺陷的影响

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摘要

Head-in-pillow (HiP) is a BGA defect which happens when solder balls and paste can't contact well during reflow soldering. Package warpage was one of the major reasons for HiP formation. In this paper, package warpage was measured and simulated. It was found that the package warpage was sensitive to the thickness of inside chips. A FEM method considering viscoelastic property of mold compound was introduced to simulate package warpage. The CTE mismatch was found contributes to more than 90% of the package warpage value when reflowing at the peak temperature. A method was introduced to measure the warpage threshold, which is the smallest warpage value that may lead to HiP. The results in different atmospheres showed that the warpage threshold was 50 mu m larger in N-2 than that in air, suggesting that under N-2 atmosphere the process window for HiP defects was larger than that under air, which agreed with the experiments.
机译:枕式焊头(HiP)是BGA的一种缺陷,发生在回流焊过程中焊球和焊膏接触不良时。封装翘曲是形成HiP的主要原因之一。本文对包装翘曲进行了测量和仿真。发现封装翘曲对内部芯片的厚度敏感。引入了考虑模塑料粘弹性的有限元方法来模拟包装翘曲。发现在峰值温度下回流时,CTE失配造成了超过90%的封装翘曲值。引入了一种测量翘曲阈值的方法,该阈值是可能导致HiP的最小翘曲值。不同气氛下的结果表明,N-2的翘曲阈值比空气的翘曲阈值大50μm,这表明在N-2气氛下,HiP缺陷的加工窗口大于空气下的翘曲,这与实验一致。

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