Charge trapping characterization of MOCVD HfO_2/p-Si interfaces at cryogenic temperatures

摘要

The paper focuses on the study of charge trapping processes in high-κ MOS structures at cryogenic temperatures. It was shown, that there is extremely strong trapping in shallow electron and hole traps, localized in the high-κ dielectrics. Concentration of shallow electron traps is as much as 10~(13) cm~(-2), while abnormal small capture cross-sections (4.5-8 × 10~(-24) cm~2 for different samples, accordingly) suggests localization of shallow emitting electron traps in transition layer "high-κ dielectric/Si", more, than at the interface. Shallow hole traps with concentration near 10~(12)cm~(-2) are separated from silicon valence band with energy barrier in the range 10-39 meV for different samples.