Modelling Battery Behaviour Using Chipset Energy Benchmarking

摘要

Despite advances in low power system design, short battery life remains a significant user concern. Effective management of energy resources available on a mobile device requires understanding of the principles of battery behaviour. We propose a time-delay model of a battery, which depends upon three non-linear processes: rate-capacity effect, recovery effect and software scheduling effect. We provide an analysis of the power consumption results using 3DMark'06 chipset benchmarks and demonstrate that a moderate-to-strong correlation between power consumption vs. CPU load, memory allocation and memory release is observed. Finally, we apply our model for chipset energy efficiency profiling and propose a power benchmark metric.