THE USE OF A VIRTUAL KNOWN GOOD DEVICE (VKGD) TO ACCELERATE 3-D PACKAGING DEVELOPMENT

摘要

One of the biggest challenges for failure analysis (FA) engineers in advanced packaging is isolating failures in the early stages of new product development. In the last few years, developers of advanced semiconductor packaging, such as 2.5-D/3-D packages, have faced the daunting challenge of introducing more complex products in a shorter amount of time. Often, the first tapeout of any new device has a near 100% failure rate, and it takes many more runs for the FA engineers to gain confidence and obtain what is known as a known good die/device (KGD). This practice is costly from the material point of view and, more importantly, from the time-to-market point of view. During this development phase, FA engineers run through many hundreds of failed devices to find the root cause of failures for each tapeout in order to gain enough statistical data for the failure mode. Often this is done destructively and is very time-consuming. Package development engineers need to know quickly and precisely which manufacturing process failed in order to fix any potential upstream process issues, rather than going through several devices to isolate the root cause of the failure. The lack of KGD has become a paramount problem in isolating systemic failures of advanced packages such as 3-D integrated circuit (IC) devices. At the IEEE 3-D System Integration Conference, TeraView introduced a novel concept aimed at addressing precisely this issue of how to diagnose early tapeout production problems quickly and accurately. The concept is called a virtual known good device (VKGD). In this case, the term device is used rather than die because this concept applies more broadly to the whole IC package and not just the die portion of the IC package. A VKGD is a device that is created through 3-D electromagnetic (EM) modeling of a new semiconductor package design, including bumps, interposers, and through-silicon vias (TSVs). Combined with TeraView's proprietary time domain reflectometry (TDR) technique, electro-optical terahertz pulse reflectometry (EOTPR), and commercially available high-frequency simulation software, the authors have achieved a technique that can help accelerate the IC packaging product development cycle. This paper demonstrates how the concept can be used in 3-D packaging development.