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The InP-HEMT IC Technology for 40-Gbit/s Optical Communications

机译:用于40 Gb / s光通信的InP-HEMT IC技术

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We present the outline of the InP HEMT IC technology. This technology realizes InP HEMT digital ICs for 40-Gbit/s optical fiber communication systems through the integration of 0.1-μm-gate-length HEMTs, vertical diodes, capacitors, and WSiN resistors with two level interconnections. This paper describes the high-speed digital IC circuit design and fabrication in InP HEMT technology for 40-Gbit/s/channel optical communication systems. Some results on InP HEMTs' reliability are also covered. Basic circuit design techniques utilizing SCFL topology and fundamental circuit elements of the selector and D-type flip-flop are discussed in detail. The basic digital ICs of MUX, D-FF, and DEMUX ICs fabricated with 0.1-μm-gate InP HEMTs successfully operated up to 50 Gbit/s in the packaged modules. These IC modules offer large speed margins for the 43-Gbit/s OTU-3 data rate. In order to develop cost-effective optical transmitters and receivers, we designed a PLL-based CDR with a full-rate architecture. The fully monolithic integrated CDR exhibited error-free operation for 2~(31)-1 PRBS data signal at the OTU-3 bit rate of 43.0184 Gbit/s. Four-bit MUX and DEMUX ICs are other key components, and could be implemented by using InP HEMT technology. Additionally, we describe InP-IC fabrication technology with two-level inter-connection. This is already fully matured for 40-Gbit/s SSI fabrication. The uniform FET characteristics and high-yield passive component fabrication technologies support this degree of maturity. InP HEMT lifetime is 10~7 hours at 100 ℃. These results prove the InP HEMT IC fabrication technology presented here, to be highly reliable. These investigations show that robust performance and yield when realizing SSI and MSI 40-Gbit/s functions.
机译:我们介绍了InP HEMT IC技术的概况。该技术通过集成具有两级互连的0.1μm栅极长度的HEMT,垂直二极管,电容器和WSiN电阻器,实现了用于40 Gbit / s光纤通信系统的InP HEMT数字IC。本文介绍了InP HEMT技术中用于40 Gbit / s /通道光通信系统的高速数字IC电路设计和制造。还涵盖了有关InP HEMT可靠性的一些结果。详细讨论了利用SCFL拓扑的基本电路设计技术以及选择器和D型触发器的基本电路元件。用0.1μm栅极InP HEMT制造的MUX,D-FF和DEMUX IC的基本数字IC在封装模块中成功运行高达50 Gbit / s。这些IC模块为43 Gbit / s OTU-3数据速率提供了很大的速度裕度。为了开发经济高效的光发射器和接收器,我们设计了具有全速率架构的基于PLL的CDR。完全集成的CDR对OTU-3比特率为43.0184 Gbit / s的2〜(31)-1 PRBS数据信号表现出无错误的操作。四位MUX和DEMUX IC是其他关键组件,可以使用InP HEMT技术实现。此外,我们介绍了具有两级互连的InP-IC制造技术。对于40 Gbit / s SSI的制造,它已经完全成熟。统一的FET特性和高成品率的无源元件制造技术可支持这种成熟度。 InP HEMT在100℃下的寿命为10〜7小时。这些结果证明了此处介绍的InP HEMT IC制造技术是高度可靠的。这些研究表明,在实现SSI和MSI 40-Gbit / s功能时,性能和良率都很高。

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