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Investigation of a power FLIMOSFET based on two-dimensional numerical simulations

机译:基于二维数值模拟的功率FLIMOSFET研究

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This paper presents the numerical simulation results for a power FLIMOSFET structure with up to eleven vertical floating islands, designed using PISCES-IIB, a 2-dimensional advanced device simulator. The novel structure is based on the FLI-diode concept, which helps in lowering the maximum electrical field in the N~epitaxial region of the device to reduce the effective on-resistance without degrading device performance. Extensive simulations were performed to understand the device physics through various internal electrical quantities like potential distribution and electric field in different regions of the device both in on/off states. The effect of drift region doping on the device performance has been discussed. It is shown that the decrease in the drift region doping tends to decrease the electric field distribution and intermediate potential in this region thereby making its on-resistance lower than the value given by the conventional silicon limit. The device structure does not require any precise control of the boron implantation dose in the P~+ floating islands for charge balance as essential in case of super junction (SJ)/COOLMOS~(? )devices. The process flow mechanism required to fabricate FLIMOSFET structure using multi-epitaxial technology has been discussed, which is less complex and less expansive than the super junction (SJ) devices technology.
机译:本文介绍了使用二维高级器件模拟器PISCES-IIB设计的具有多达11个垂直浮岛的功率FLIMOSFET结构的数值模拟结果。这种新颖的结构基于FLI二极管的概念,它有助于降低器件N_e外延区域中的最大电场,从而在不降低器件性能的情况下降低有效导通电阻。进行了广泛的仿真,以通过各种内部电量(例如处于开/关状态的设备不同区域中的电势分布和电场)了解设备的物理性质。已经讨论了漂移区掺杂对器件性能的影响。结果表明,漂移区掺杂的减少趋向于减小该区域中的电场分布和中间电势,从而使其导通电阻低于常规硅极限值。在超级结(SJ)/ COOLMOS〜(?)器件的情况下,该器件结构不需要任何精确控制P〜+浮岛中的硼注入剂量以实现电荷平衡。已经讨论了使用多外延技术制造FLIMOSFET结构所需的工艺流程机制,该机制比超级结(SJ)器件技术复杂度低且扩展性小。

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