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Practical and scalable evolution of digital circuits

机译:数字电路的实用且可扩展的发展

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This paper addresses the scalability problem prevalent in the evolutionary design of digital circuits and shows that Evolvable Hardware (EHW) can indeed be considered as a viable alternative design methodology for large and complex circuits. Despite the effort by the EHW community to overcome the scalability problems using both direct mapped techniques and developmental approaches, so far only small circuits have been evolved. This paper shows that, by partitioning a digital circuit and making use of a modular developmental approach, namely, the Modular Developmental Cartesian Genetic Programming (MDCGP) technique, it is indeed possible to evolve large circuits. As a proof of concept, a 5 x 5 multiplier is evolved for partition sizes of 32 and 64. It is shown that compared to the direct evolution technique, the MDCGP technique provides five times reduction in terms of evolution times, 6-56% reduction in area and improved fault tolerance. The technique is readily scalable and can be applied to even larger partition sizes, and also to sequential circuits, thus providing a promising path to evolve large and complex circuits.
机译:本文解决了数字电路演进设计中普遍存在的可扩展性问题,并表明,可演进硬件(EHW)确实可以被视为大型和复杂电路的可行替代设计方法。尽管EHW社区致力于使用直接映射技术和开发方法来克服可伸缩性问题,但迄今为止,仅开发了小型电路。本文表明,通过划分数字电路并利用模块化开发方法,即模块化开发笛卡尔遗传规划(MDCGP)技术,确实有可能开发大型电路。作为概念验证,针对分区大小为32和64的情况,对5 x 5乘数进行了进化。结果表明,与直接进化技术相比,MDCGP技术的进化时间减少了五倍,减少了6-56%面积和提高的容错能力。该技术易于扩展,可以应用于更大的分区,也可以应用于顺序电路,从而为发展大型复杂电路提供了一条有希望的途径。

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