A 76-dBm IIP2 down-conversion mixer for TD-SCDMA/RFID applications

摘要

This paper presents a semi-active in-phase/quadrature inductor-less down-conversion mixer. The mixer consists of an active trans-conductance stage, a passive current switching stage, and a trans-impedance stage. A complementary input architecture has been used to increase the trans-conductance for a given bias current. An on-chip prescaler is added to provide the balanced LO signals, while the CMFB circuit in trans-conductance stage is designed to enhance linearity. The chip was achieved in a 0.13 μm CMOS technology. It features 5 dB conversion gain over a broad range from 800 MHz to 2.1 GHz, which supports Chinese TD-SCDMA/RFID standards simultaneously. The maximum IIP2 is +76 dBm at 2.1 GHz and suitable for application within a direct-conversion receiver.