Dual-channel multiplexing technology and its realization in interpolation filter in stereo audio sigma-delta DAC

摘要

In this paper, we propose a novel low-cost and hardware-efficient digital interpolation filter applied to stereo audio sigma-delta digital-to-analog converter. The paper presents a dual-channel multiplexing structure and utilizes memories to realize the first stage half-band filter in the interpolation filter for reaching the goal of saving chip area. The reorder technique is derived to synchronize the two channels after multiplexing. The design is implemented on 0.18 μm 1.8/3.3 V 1P5M CMOS process. The measurement results show that the signal-to-noise ratio of the DAC achieves 106 dB and the digital part of chip only takes a proportion of 0.198 mm~2 with only 0.65 mW power consumption. The proposed design decreases the area and power dissipation, meanwhile, gives much more design margin to the analog part of Σ-Δ DAC, which benefits for the mixed-signal system design.