Demonstration of an analog IC function maintenance strategy, including direct calibration, built-in self-test, and commutation of redundant functional blocks

摘要

A new analog subsystem maintenance strategy is presented that can be used to improve the accuracy, reliability, yield, and testability of analog and mixed-signal ICs. This scheme is a generally applicable design approach that combines hybrid redundancy, direct subcircuit parameter adjustment (calibration), and on-chip analog function verification (built-in self-test). Improvements are realized in a system-transparent fashion through careful function block commutation. The cost is a moderate die area increase. This design strategy is applicable to a wide range of moderately complex analog functions. An example analog function is used here to illustrate this new maintenance approach. Experimental data demonstrate the capabilities of this new approach to analog IC design for testability.