Construction of a multi-threaded VLIW processor using both instruction-level and thread-level parallelism

摘要

This paper presents a construction of a multi-threaded VLIW processor using both instruction-level and thread-level parallelism. Typical multi-threaded processors are able to improve machine throughput but increase response time. We categorize threads into main threads which require fast response time and sub threads which do not. Oar multi-threaded VLIW processor executes instruction of sob threads instead of NOPs of main threads. Our processor executes main threads as fast as response time when these threads are executed on the VLIW processor. We show the effectiveness of our multi-threaded VLIW processor by presenting experimental result.