首页> 外文期刊>電子情報通信学会技術研究報告. 集積回路. Integrated Circuits and Devices >Search area sizes optimization for '2-step improved breaking-off-search (2S-IBOS)' motion estimation algorithm and low-power 0.13-μm CMOS motion estimators for MPEG4 encoding
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Search area sizes optimization for '2-step improved breaking-off-search (2S-IBOS)' motion estimation algorithm and low-power 0.13-μm CMOS motion estimators for MPEG4 encoding

机译:搜索区域大小优化为“2步改进断开搜索(2S-IBOS)”运动估计算法和低功耗0.13-μmCMOS运动估算,用于MPEG4编码

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摘要

A fast-motion-estimation (ME) algorithm called a "two-step improved-breaking-off-search (25-IBOS)" method was developed for MPEG4. Sizes of the search areas were optimized to improve block-matching speed while maintaining picture quality. It can improve processing speed of the full-search (FS) method by a factor of 30 to 86, depending on picture types, while maintaining visual quality of the full-search method. At clock frequency of 220 MHz and supply voltage of 0.89 V the power dissipation of a 0.13-μm CMOS accumulation type motion estimator using 25-IBOS was reduced to 280μW which was only 10.7% that of the conventional tree type architecture ME array LSI.
机译:为MPEG4开发了一种用于“两步改进 - 断开搜索(25-IBOS)”方法的快速运动估计(ME)算法。 优化搜索区域的大小以提高块匹配速度,同时保持图像质量。 它可以将全搜索(FS)方法的处理速度提高30到86,这取决于图像类型,同时保持全搜索方法的视觉质量。 时钟频率为220 MHz,电源电压为0.89V,使用25-IBOS的0.13-μmCMOS累积型运动估算器的功耗降低到280μW,仅为传统的树型架构ME Array LSI的10.7%。

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