Self-checking multiple-valued integrated circuit based on dual-rail current-mode logic and its application to a high-performance arithmetic VLSI system

摘要

This paper presents a new totally self-checking circuit based on dual-rail multiple-valued current-mode (MVCM) logic where almost all the basic components except a differential-pair circuit have been already duplicated, which results in small hardware overhead compared with a non-self-checking circuit based on dual-rail MVCM logic. It is demonstrated in a 0.35-μm CMOS technology that the performance of the 8×8-bit multiplier based on the proposed self-checking circuit is superior to that of full duplication of the non self-checking circuit based on dual-rail MVCM logic in terms of chip area and dynamic power dissipation under the same switching delay.